SAN DIEGO, Nov. 23, 2021 (GLOBE NEWSWIRE) — GBT Technologies Inc. (OTC PINK: GTCHD) (“GBT” or the “Company”), is developing a nanometer range EDA tool that visually advises and eliminates design rule violations during the construction of an integrated circuit physical layout. The tool works on IC layout data and checks for design rules correctness, as specified in the process specifications (Technology file) during the construction of an IC layout, creating a Rule-Aware Mask design environment.
Based on the recent patent that GBT filed in this domain, the new tool will read the manufacturing process rule deck(s) to understand the IC design rules, guidelines and constraints. The tool will advise the user about potential design rule violations during the construction of a mask layout database, by providing a real time visual feedback. The tool is operating within a layout editor’s IC layout database recommending a necessary correction to ensure correct-by-construction IC layout. This approach could save a significant amount of the global project’s design time by early identification and elimination of design violation and flaws. The system will also include an option to automatically correct these violations, maintaining the design’s electrical connectivity, geometrical rules, and reliability rules correctness. The tool will have the capability to detect design rule violation hierarchically, and offer fix-recommendations during the construction of IC layout blocks. Over the past several years, microchip’s number of transistors has dramatically increased, prolonging a project design’s time and schedule. GBT believes that by addressing potential violations early during the IC layout design phase, significant time could potentially be saved. This type of technology is estimated to save between 30%-50% of the entire physical layout design time; especially, with advanced nanometer microchips. The company intends to develop an entire family of clean-by-construction software tools in order to boost an IC project’s design time, the technology is targeted to support analog, digital and mixed signal IC’s designs.
“Our today’s microchip’s include billions of transistors and advanced functionalities. In addition, they need to consume minimal power and operate with high performance, it’s all a matter of optimal balance between silicon area, power constraints, speed and required functionalities. As the manufacturing process is constantly getting smaller, the semiconductor’s physics introduces new geometrical, electrical and manufacturing design rule challenges, causing significantly longer project design time, and time-to- market. Our idea is to address potential design issues, early during the design phase. GBT’s team is currently working on a software tool to analyze and identify design rule violations during the IC layout construction phase. Similar to the ‘spell-check’ highlight concept, our tool will highlight potential violations as the designer is constructing and building the integrated circuit layout blocks. Although not a new concept, we will introduce a new approach that visually analyzes and alerts areas-of-interest associated with potential design violations. This will include graphic representation and topological recommendations within the mask layout data, where a non-compliance issue was detected. Furthermore, the system will offer an automatic correction upon the user’s approval to eliminate the flaw on the spot. The tool will be based on a region analysis concept and provide multi-zones visual feedback to increase the vitality level of the reported violations. The technology will support analog, digital and mixed IC’s design styles; including a full hierarchical support, and we predict that the technology will be mostly efficient in advanced manufacturing nodes of 7nm and below due to their acute design rule complexities. Designers will be able to design their microchips much easier, as an interactive assistance is constantly supervising them in the background, guiding them as they go, ensuring a clean-by-construction mask layout database,” said Danny Rittman, the Company’s CTO.
There is no guarantee that the Company will be successful in researching, developing or implementing this system. In order to successfully implement this concept, the Company will need to raise adequate capital to support its research and, if successfully researched and fully developed, the Company would need to enter into a strategic relationship with a third party that has experience in manufacturing, selling and distributing this product. There is no guarantee that the Company will be successful in any or all of these critical steps.
GBT Technologies, Inc. (OTC PINK: GTCHD) (“GBT”) (http://gbtti.com) is a development stage company which considers itself a native of Internet of Things (IoT), Artificial Intelligence (AI) and Enabled Mobile Technology Platforms used to increase IC performance. GBT has assembled a team with extensive technology expertise and is building an intellectual property portfolio consisting of many patents. GBT’s mission is to license the technology and IP to synergetic partners in the areas of hardware and software. Once commercialized, it is GBT’s goal to have a suite of products including smart microchips, AI, encryption, Blockchain, IC design, mobile security applications, database management protocols, with tracking and supporting cloud software (without the need for GPS). GBT envisions this system as a creation of a global mesh network using advanced nodes and super performing new generation IC technology. The core of the system will be its advanced microchip technology; technology that can be installed in any mobile or fixed device worldwide. GBT’s vision is to produce this system as a low cost, secure, private-mesh-network between all enabled devices. Thus, providing shared processing, advanced mobile database management and sharing while using these enhanced mobile features as an alternative to traditional carrier services.
Certain statements contained in this press release may constitute “forward-looking statements”. Forward-looking statements provide current expectations of future events based on certain assumptions and include any statement that does not directly relate to any historical or current fact. Actual results may differ materially from those indicated by such forward-looking statements because of various important factors as disclosed in our filings with the Securities and Exchange Commission located at their website (http://www.sec.gov). In addition to these factors, actual future performance, outcomes, and results may differ materially because of more general factors including (without limitation) general industry and market conditions and growth rates, economic conditions, governmental and public policy changes, the Company’s ability to raise capital on acceptable terms, if at all, the Company’s successful development of its products and the integration into its existing products and the commercial acceptance of the Company’s products. The forward-looking statements included in this press release represent the Company’s views as of the date of this press release and these views could change. However, while the Company may elect to update these forward-looking statements at some point in the future, the Company specifically disclaims any obligation to do so. These forward-looking statements should not be relied upon as representing the Company’s views as of any date subsequent to the date of the press release.
Dr. Danny Rittman, CTO